India, Sept. 29 -- Cadence has introduced a new agent for Cadence ChipStack AI Super Agent that automates front-end digital design and verification-covering power, performance and area (PPA)-driven spec-to-RTL generation, RTL analysis, and refinement; all from natural language prompts.

Building on the industry's first agentic workflow for front-end design and verification announced in February 2026, this RTL Generation Agent extends the ChipStack AI Super Agent from autonomous verification and debug into high-quality RTL creation and optimization.

In early evaluations, the RTL Generation Agent delivered an average of 24% area reduction and 18% power reduction versus pure foundation model code generation, while ensuring 100% functionally...