India, Sept. 1 -- Achronix Semiconductor Corp. has announced the availability of its high-performance JESD204C IP core for the Speedster7t FPGA family.

Designed to connect advanced analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) to programmable logic, each core supports data rates of up to 32 Gbps per lane and up to eight lanes per link, delivering an aggregate serial line rate of up to 256 Gbps, while combining up to four cores enables aggregate performance of up to 1 Tbps.

This standards-based core enables Speedster7t FPGAs to seamlessly interface with very high-speed JESD204B and JESD204C converters from leading suppliers, including Analog Devices and Texas Instruments.

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