Exclusive

Publication

Byline

Location

US Patent Issued to Apple on June 23 for "Barriers for selective exposed molding of variable height components" (Singaporean, American Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,667,024, issued on June 23, was assigned to Apple Inc. (Cupertino, Calif.). "Barriers for selective exposed molding of variable height componen... Read More


US Patent Issued to KIOXIA on June 23 for "Semiconductor memory device" (Japanese Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,667,025, issued on June 23, was assigned to KIOXIA Corp. (Tokyo). "Semiconductor memory device" was invented by Tomoya Sanuki (Yokkaichi, Japan... Read More


US Patent Issued to SAMSUNG ELECTRONICS on June 23 for "Semiconductor package" (South Korean Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,667,026, issued on June 23, was assigned to SAMSUNG ELECTRONICS Co. LTD. (Suwon-si, South Korea). "Semiconductor package" was invented by Daeho... Read More


US Patent Issued to AUO on June 23 for "Routing structure of display screen" (Taiwanese Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,667,027, issued on June 23, was assigned to AUO Corp. (Hsinchu City, Taiwan). "Routing structure of display screen" was invented by Yueh-Chi Wu... Read More


US Patent Issued to QUALCOMM on June 23 for "Package comprising a substrate with post interconnects and a solder resist layer having a cavity" (California Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,667,029, issued on June 23, was assigned to QUALCOMM Inc. (San Diego). "Package comprising a substrate with post interconnects and a solder res... Read More


US Patent Issued to STMICROELECTRONICS (TOURS) on June 23 for "Electronic chips including J-shaped substrate sidewalls" (French Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,667,030, issued on June 23, was assigned to STMICROELECTRONICS (TOURS) SAS (Tours, France). "Electronic chips including J-shaped substrate side... Read More


US Patent Issued to ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES on June 23 for "Direct bonding on package substrates" (California Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,667,031, issued on June 23, was assigned to ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC. (San Jose, Calif.). "Direct bonding on package substr... Read More


US Patent Issued to Arm on June 23 for "Timeout period generation" (British Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,663,828, issued on June 23, was assigned to Arm Ltd. (Cambridge, Great Britain). "Timeout period generation" was invented by Rohan Gaddh (Cambr... Read More


US Patent Issued to Alphacore on June 23 for "Closed-loop sampling methods and systems" (Arizona Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,663,829, issued on June 23, was assigned to Alphacore Inc. (Tempe, Ariz.). "Closed-loop sampling methods and systems" was invented by Sachin Na... Read More


US Patent Issued to AT&T Intellectual Property I on June 23 for "Artificial intelligence (AI) / machine learning (ML) enabled adaptive/configurable internet-of-things (IoT) services" (Georgia, Washington, Texas Inventors)

ALEXANDRIA, Va., July 15 -- United States Patent no. 12,663,830, issued on June 23, was assigned to AT&T Intellectual Property I LP (Atlanta). "Artificial intelligence (AI) / machine learning (ML) en... Read More