US Patent Issued to INTERNATIONAL BUSINESS MACHINES on Nov. 3 for "Modifying netlists for device changes in ic designs" (Israeli, American, German Inventors)

Posted On: 2026-11-03

ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,764, issued on Nov. 3, was assigned to INTERNATIONAL BUSINESS MACHINES Corp. (Armonk, N.Y.). "Modifying netlists for device changes in ic de... Read More

US Patent Issued to HANGZHOU SILAN MICROELECTRONICS on Nov. 3 for "Method for flip-flop unit" (Chinese Inventors)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,765, issued on Nov. 3, was assigned to HANGZHOU SILAN MICROELECTRONICS Co. LTD. (Hangzhou, China). "Method for flip-flop unit" was invented ... Read More

US Patent Issued to International Business Machines on Nov. 3 for "Verifying multi-cycle interconnect synthesis optimization in automatically generated physical hierarchy chip design" (Texas, New York Inventors)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,766, issued on Nov. 3, was assigned to International Business Machines Corp. (Armonk, N.Y.). "Verifying multi-cycle interconnect synthesis o... Read More

US Patent Issued to The Board of Trustees of the Leland Stanford Junior University on Nov. 3 for "Generalized QED pre-silicon verification framework" (California Inventors)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,767, issued on Nov. 3, was assigned to The Board of Trustees of the Leland Stanford Junior University (Stanford, Calif.). "Generalized QED p... Read More

US Patent Issued to Taiwan Semiconductor Manufacturing on Nov. 3 for "Fault detection of circuit based on virtual defects" (American, Taiwanese Inventors)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,768, issued on Nov. 3, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan). "Fault detection of circuit based on v... Read More

US Patent Issued to Plexim on Nov. 3 for "Method and apparatus for simulating an electrical circuit, digital real-time simulator, computer program and computer-readable medium" (Swiss Inventor)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,769, issued on Nov. 3, was assigned to Plexim GmbH (Zurich, Switzerland). "Method and apparatus for simulating an electrical circuit, digita... Read More

US Patent Issued to International Business Machines on Nov. 3 for "Timing analysis of a digital integrated circuit using intent based timing constraints" (American, Indian Inventors)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,770, issued on Nov. 3, was assigned to International Business Machines Corp. (Armonk, N.Y.). "Timing analysis of a digital integrated circui... Read More

US Patent Issued to XILINX on Nov. 3 for "Aligning multi-chip devices" (Colorado Inventor)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,771, issued on Nov. 3, was assigned to XILINX INC. (San Jose, Calif.). "Aligning multi-chip devices" was invented by Martin L. Voogel (Niwot... Read More

US Patent Issued to Plexim on Nov. 3 for "Method and apparatus for simulating an electrical circuit, digital real-time simulator, computer program and computer-readable medium" (Swiss Inventor)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,772, issued on Nov. 3, was assigned to Plexim GmbH (Zurich, Switzerland). "Method and apparatus for simulating an electrical circuit, digita... Read More

US Patent Issued to Applied Materials on Nov. 3 for "Dose mapping using substrate curvature to compensate for out-of-plane distortion" (California Inventor)

Posted On: 2026-11-03

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ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,773, issued on Nov. 3, was assigned to Applied Materials Inc. (Santa Clara, Calif.). "Dose mapping using substrate curvature to compensate f... Read More

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US Patent Issued to INTERNATIONAL BUSINESS MACHINES on Nov. 3 for "Modifying netlists for device changes in ic designs" (Israeli, American, German Inventors)

US Patent Issued to HANGZHOU SILAN MICROELECTRONICS on Nov. 3 for "Method for flip-flop unit" (Chinese Inventors)

US Patent Issued to International Business Machines on Nov. 3 for "Verifying multi-cycle interconnect synthesis optimization in automatically generated physical hierarchy chip design" (Texas, New York Inventors)

US Patent Issued to The Board of Trustees of the Leland Stanford Junior University on Nov. 3 for "Generalized QED pre-silicon verification framework" (California Inventors)

US Patent Issued to Taiwan Semiconductor Manufacturing on Nov. 3 for "Fault detection of circuit based on virtual defects" (American, Taiwanese Inventors)

US Patent Issued to Plexim on Nov. 3 for "Method and apparatus for simulating an electrical circuit, digital real-time simulator, computer program and computer-readable medium" (Swiss Inventor)

US Patent Issued to International Business Machines on Nov. 3 for "Timing analysis of a digital integrated circuit using intent based timing constraints" (American, Indian Inventors)

US Patent Issued to XILINX on Nov. 3 for "Aligning multi-chip devices" (Colorado Inventor)

US Patent Issued to Plexim on Nov. 3 for "Method and apparatus for simulating an electrical circuit, digital real-time simulator, computer program and computer-readable medium" (Swiss Inventor)

US Patent Issued to Applied Materials on Nov. 3 for "Dose mapping using substrate curvature to compensate for out-of-plane distortion" (California Inventor)