US Patent Issued to WUHAN XINXIN SEMICONDUCTOR MANUFACTURING on Sept. 29 for "3D memory block having low-resistance source/drain buried layer stacked architecture" (Chinese Inventor)

ALEXANDRIA, Va., Sept. 30 -- United States Patent no. 12,749,533, issued on Sept. 29, was assigned to WUHAN XINXIN SEMICONDUCTOR MANUFACTURING Co. LTD. (Wuhan, China).

"3D memory block having low-resistance source/drain buried layer stacked architecture" was invented by Kaiwei Cao (Wuhan, China).

According to the abstract* released by the U.S. Patent & Trademark Office: "The present disclosure provides a memory block, a memory cell, and a manufacturing method of a memory block. The memory block includes a memory array, including: a plurality of columns of semiconductor stacked strip structures that are spaced apart along a row direction; wherein each column of stacked strip structure extends along a column direction and comprises at least...