ALEXANDRIA, Va., Dec. 16 -- United States Patent no. 12,498,927, issued on Dec. 16, was assigned to Ventana Micro Systems Inc. (Cupertino, Calif.).
"Microprocessor that allows same-fetch block start address co-residence of unrolled loop multi-fetch block macro-op cache entry and loop body macro-op cache entry used to build same" was invented by John G. Favor (San Francisco) and Michael N. Michael (Folsom, Calif.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A microprocessor includes a prediction unit (PRU) that continuously predicts a sequence of fetch block start addresses (FBSAs) that specify a corresponding sequence of fetch blocks (FBlks) in a program instruction stream and a macro-op cache (MOC) having...