ALEXANDRIA, Va., July 15 -- United States Patent no. 12,666,933, issued on June 23, was assigned to Tokyo Electron Ltd. (Tokyo).

"Low resistance liner" was invented by Tek Po Rinus Lee (Albany, N.Y.), Gyanaranjan Pattanaik (Albany, N.Y.) and Kenichi Imakita (Albany, N.Y.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method of processing a substrate includes forming an amorphous silicon (a-Si) layer over the substrate, where the substrate includes a dielectric layer and a conductive layer, and the a-Si liner covers a surface of the dielectric layer and a surface of the conductive layer. The method includes converting the a-Si liner into a silicon-containing layer including a metal; and depositing the metal...