US Patent Issued to Taiwan Semiconductor Manufacturing on Sept. 29 for "Bit selection for power reduction in stacking structure during memory programming" (Taiwanese, American Inventors)

ALEXANDRIA, Va., Sept. 30 -- United States Patent no. 12,749,548, issued on Sept. 29, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"Bit selection for power reduction in stacking structure during memory programming" was invented by Meng-Sheng Chang (Hsinchu, Taiwan), Yoshitaka Yamauchi (Hsinchu, Taiwan) and Perng-Fei Yuh (Walnut Creek, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Systems, devices, and methods are described herein for a programmable memory array. A programmable memory system includes an array of programmable memory bit cells. A memory bit cell of the array includes a first transistor of a first type controlled by a bit line, a second transistor of a s...