US Patent Issued to Taiwan Semiconductor Manufacturing on Nov. 3 for "VT1 reduction using vertical NPN" (Taiwanese Inventors)

ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,787,450, issued on Nov. 3, was assigned to Taiwan Semiconductor Manufacturing Co. Ltd. (Hsinchu, Taiwan).

"VT1 reduction using vertical NPN" was invented by Ken-Hao Fan (Hsinchu, Taiwan), Yu-Ti Su (Hsinchu, Taiwan), Sheng-Fu Hsu (Hsinchu, Taiwan) and Hao-Hua Hsu (Taipei City, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A semiconductor device that includes an n-buried layer, a p-well region over the n-buried layer, an n-channel MOSFET that includes an n-drain region, and a vertical NPN BJT having a collector that is the n-drain region and a base that is the p-well region. The p-well region is floating."

The patent was filed on July 5, 2023, und...