US Patent Issued to TAIWAN SEMICONDUCTOR MANUFACTURING on Jan. 13 for "Integrated circuit layout method" (Taiwanese Inventors)

ALEXANDRIA, Va., Jan. 13 -- United States Patent no. 12,527,093, issued on Jan. 13, was assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. (Hsinchu, Taiwan).

"Integrated circuit layout method" was invented by Po-Zeng Kang (Hsin-Hua, Taiwan), Wen-Shen Chou (Zhubei, Taiwan) and Yung-Chow Peng (Hsinchu, Taiwan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method of generating an IC layout diagram includes positioning a resistor unit cell in the IC layout diagram, a resistor of the resistor unit cell including a source/drain metal region, positioning a MOS unit cell in the IC layout diagram, overlapping the resistor unit cell with a first via region, overlapping the MOS unit cell with a second via re...