ALEXANDRIA, Va., June 4 -- United States Patent no. 12,322,699, issued on June 3, was assigned to Tahoe Research Ltd. (Dublin).

"Method of forming high density, high shorting margin, and low capacitance interconnects by alternating recessed trenches" was invented by Christopher J. Jezewski (Hillsboro, Ore.) and Jasmeet S. Chawla (Hillsboro, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Embodiments of the invention describe low capacitance interconnect structures for semiconductor devices and methods for manufacturing such devices. According to an embodiment of the invention, a low capacitance interconnect structure comprises an interlayer dielectric (ILD). First and second interconnect lines are dispos...