US Patent Issued to Synopsys on July 14 for "Optimization of circuit design layout using dynamic probability of success of component placement in integrated circuit design" (California Inventors)

ALEXANDRIA, Va., July 14 -- United States Patent no. 12,682,146, issued on July 14, was assigned to Synopsys Inc. (Sunnyvale, Calif.).

"Optimization of circuit design layout using dynamic probability of success of component placement in integrated circuit design" was invented by Shveta Sharma (Los Altos, Calif.) and Ranjan Prasad Mandal (Sunnyvale, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method and system are provided for placing cells in a circuit design layout. The method includes placing the cells at candidate locations in the circuit design layout in accordance with design rules, and determining, for each location, a probability of design rule success for the placement of each cell of the...