US Patent Issued to Synopsys on Aug. 11 for "Layout versus schematic (LVS) device extraction using pattern matching" (American, Chinese Inventors)

ALEXANDRIA, Va., Aug. 12 -- United States Patent no. 12,705,414, issued on Aug. 11, was assigned to Synopsys Inc. (Sunnyvale, Calif.).

"Layout versus schematic (LVS) device extraction using pattern matching" was invented by Soo Han Choi (Pleasanton, Calif.), Anil Karanam (Saratoga, Calif.), Elango Velayutham (Saratoga, Calif.) and Yuli Xue (Shanghai).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method includes obtaining a target integrated circuit (IC) layout, accessing a repository, identifying a device within the target IC layout by matching an area of the target IC layout to a source pattern, and replacing at least a portion of the area of the target IC layout with a replacement pattern. The repository...