US Patent Issued to Silicon Laboratories on Oct. 20 for "Fast-settling delay line assisted by replica delay line" (Singaporean, Swiss Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,771,332, issued on Oct. 20, was assigned to Silicon Laboratories Inc. (Austin, Texas).

"Fast-settling delay line assisted by replica delay line" was invented by Tak Ying Wong (Singapore), Pio Balmelli (Arogno, Switzerland), Yun Da Bryan Seah (Singapore) and Hua Beng Chan (Singapore).

According to the abstract* released by the U.S. Patent & Trademark Office: "A fast-settling delay line having a reduced or negligible delay variation in response to enabling the delay line includes a replica load coupled to a control node of a main delay line before a first edge of a clock input to the main delay line. The replica load is equivalent to the load on the control node introduced by the main ...