US Patent Issued to Semiconductor Energy Laboratory on Sept. 1 for "Layout method for automatically generating circuit layout and control system for controlling layout arrangement of circuit generated over substrate" (Japanese Inventors)

ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,724,945, issued on Sept. 1, was assigned to Semiconductor Energy Laboratory Co. Ltd. (Atsugi, Japan).

"Layout method for automatically generating circuit layout and control system for controlling layout arrangement of circuit generated over substrate" was invented by Seiko Inoue (Atsugi, Japan), Ryo Nakazato (Ebina, Japan) and Takahiro Fukutome (Atsugi, Japan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A novel circuit layout method is provided. In a circuit including a first terminal, a second terminal, a third terminal, a fourth terminal, a first wiring, and a second wiring, the layout method includes a step of generating a layout of connecting the ...