US Patent Issued to PowerLattice Technologies on July 14 for "Power management techniques using location-mapped chiplet configuration" (Washington, Arizona Inventors)

ALEXANDRIA, Va., July 14 -- United States Patent no. 12,681,516, issued on July 14, was assigned to PowerLattice Technologies Inc. (Camas, Wash.).

"Power management techniques using location-mapped chiplet configuration" was invented by Peng Zou (Camas, Wash.), Gang Ren (Camas, Wash.) and Sujith S. Dermal (Chandler, Ariz.).

According to the abstract* released by the U.S. Patent & Trademark Office: "This application is directed to an electronic device having a configurable group of voltage regulator cells. The electronic device includes a group of voltage regulator cells operating based on parameter settings of individual voltage regulator cells, output a rail voltage, and provide the rail voltage to multiple power rails. The electronic de...