ALEXANDRIA, Va., April 7 -- United States Patent no. 12,598,745, issued on April 7, was assigned to Powerchip Semiconductor Manufacturing Corp. (Hsinchu, Taiwan).
"Double patterning method of manufacturing select gates and word lines" was invented by Yi-Yeh Chuang (Changhua County, Taiwan), Zih-Song Wang (Nantou County, Taiwan), Li-Ta Chen (New Taipei City, Taiwan) and Shun-Yu Gao (Hsinchu City, Taiwan).
According to the abstract* released by the U.S. Patent & Trademark Office: "A double patterning method of manufacturing select gates and word lines is provided in the present invention, including forming first string patterns composed of word line patterns and select gate patterns on a target layer, forming a conformal spacer layer on fir...