US Patent Issued to Micron Technology on Sept. 22 for "Memory cell read threshold voltage optimization" (California Inventors)

ALEXANDRIA, Va., Sept. 24 -- United States Patent no. 12,744,092, issued on Sept. 22, was assigned to Micron Technology Inc. (Boise, Idaho).

"Memory cell read threshold voltage optimization" was invented by Patrick R. Khayat (San Diego), Sivagnanam Parthasarathy (Carlsbad, Calif.) and Mariano Burich (San Diego).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method for determining an optimal read voltage for reading a set of memory cells is described. Read voltages having different amplitudes are provided to each of the memory cells. An output of each of the memory cells is read in response to each of the read voltages. An approximate amplitude of a threshold voltage of each of the memory cells is determined...