US Patent Issued to Micron Technology on May 26 for "Selectively erasing one of multiple erase blocks coupled to a same string by creating a pseudo PN junction" (Singaporean, American, Japanese, Italian Inventors)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,640,207, issued on May 26, was assigned to Micron Technology Inc. (Boise, Idaho).

"Selectively erasing one of multiple erase blocks coupled to a same string by creating a pseudo PN junction" was invented by Shyam Sunder Raghunathan (Woodlands, Singapore), Yingda Dong (Los Altos, Calif.), Akira Goda (Tokyo) and Leo Raimondo (Avezzano, Italy).

According to the abstract* released by the U.S. Patent & Trademark Office: "Erase operations can be performed selectively on one of erase blocks or a memory array coupled to the same string by creating a pseudo PN junction that is located adjacent to the selected erase block. The pseudo PN junction is created by including channel inversion at leas...