US Patent Issued to Micron Technology on May 19 for "Row weight adjustment in two-level low-density parity-check (LDPC) error correction" (California Inventors)

ALEXANDRIA, Va., May 19 -- United States Patent no. 12,633,943, issued on May 19, was assigned to Micron Technology Inc. (Boise, Idaho).

"Row weight adjustment in two-level low-density parity-check (LDPC) error correction" was invented by Mustafa N. Kaynak (San Diego) and Eyal En Gad (Fremont, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A method for error correction includes reading, by a memory controller, a first-level codeword from a memory device, the first-level codeword having user data and first-level parity data. The method includes decoding, by the memory controller responsive to determining the first-level codeword contains errors, the first-level codeword using a first-level low-density ...