US Patent Issued to Micron Technology on Feb. 24 for "Wafer alignment for stacked wafers and semiconductor device assemblies" (Japanese, American Inventors)

ALEXANDRIA, Va., Feb. 24 -- United States Patent no. 12,564,067, issued on Feb. 24, was assigned to Micron Technology Inc. (Boise, Idaho).

"Wafer alignment for stacked wafers and semiconductor device assemblies" was invented by Shiro Uchiyama (Tokyo) and Eiichi Nakano (Boise, Idaho).

According to the abstract* released by the U.S. Patent & Trademark Office: "A semiconductor device assembly including a first semiconductor wafer having a first side and a second side opposite the first side, the first semiconductor wafer including: a first plurality of semiconductor devices at the first side, a plurality of non-metallic vias extending from the second side towards the first side, and a plurality of alignment marks, each vertically aligned wit...