US Patent Issued to Micron Technology on Feb. 10 for "Patterning of 3D NAND pillars and flying buttress supports with two stripe technique" (Idaho Inventors)

ALEXANDRIA, Va., Feb. 11 -- United States Patent no. 12,550,738, issued on Feb. 10, was assigned to Micron Technology Inc. (Boise, Idaho).

"Patterning of 3D NAND pillars and flying buttress supports with two stripe technique" was invented by Shruti Jain (Boise, Idaho) and Anton P. Eppich (Boise, Idaho).

According to the abstract* released by the U.S. Patent & Trademark Office: "A three-dimensional (3D) memory device including a stack of alternating supporting lattice layers and dielectric layers on a substrate, a plurality of memory pillars vertically penetrating the stack, each of the plurality of memory pillars including a plurality of vertically connected replacement gate (RG) memory cells that correspond to the supporting lattice laye...