US Patent Issued to Micron Technology on Dec. 16 for "Mitigating slow read disturb in a memory sub-system" (California, Idaho Inventors)

ALEXANDRIA, Va., Dec. 16 -- United States Patent no. 12,498,877, issued on Dec. 16, was assigned to Micron Technology Inc. (Boise, Idaho).

"Mitigating slow read disturb in a memory sub-system" was invented by Vamsi Pavan Rayaprolu (Santa Clara, Calif.), Kishore Kumar Muchherla (San Jose, Calif.), Ashutosh Malshe (Fremont, Calif.), Giuseppina Puzzilli (Boise, Idaho) and Saeed Sharifi Tehrani (San Diego).

According to the abstract* released by the U.S. Patent & Trademark Office: "Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, responsive to receiving a read request to perform a read operation on a block of the memory device, increme...