US Patent Issued to Micron Technology on Aug. 4 for "Memory subarray and interconnection circuit arrangement" (Idaho Inventor)

ALEXANDRIA, Va., Aug. 5 -- United States Patent no. 12,700,441, issued on Aug. 4, was assigned to Micron Technology Inc. (Boise, Idaho).

"Memory subarray and interconnection circuit arrangement" was invented by Jacob Robert Anderson (Meridian, Idaho).

According to the abstract* released by the U.S. Patent & Trademark Office: "Methods, systems, and devices for memory array circuit arrangement are described. A memory device may include a memory subarray, which may include a complementary metal oxide semiconductor (CMOS) circuitry under array (CuA) circuitry area and a word line driver region (e.g., word line driver circuitry) or a digit line driver region (e.g., digit line driver circuitry, sense amplifier circuitry multiplexed with the dig...