US Patent Issued to Intel on Oct. 20 for "Logic circuits using vertical transistors with backside source or drain regions" (Oregon, California Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,772,447, issued on Oct. 20, was assigned to Intel Corp. (Santa Clara, Calif.).

"Logic circuits using vertical transistors with backside source or drain regions" was invented by Sagar Suthram (Portland, Ore.), Tahir Ghani (Portland, Ore.), Anand S. Murthy (Portland, Ore.), Wilfred Gomes (Portland, Ore.), Pushkar Sharad Ranade (San Jose, Calif.), Abhishek A. Sharma (Portland, Ore.) and Rishabh Mehandru (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "IC devices with logic circuits using vertical transistors with backside source or drain (S/D) regions, and related assemblies and methods, are disclosed herein. An example vertical transistor in...