US Patent Issued to Intel on Nov. 3 for "Wall coupled with two stacks of nanoribbons to electrical isolate gate metals" (Oregon Inventors)

ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,787,363, issued on Nov. 3, was assigned to Intel Corp. (Santa Clara, Calif.).

"Wall coupled with two stacks of nanoribbons to electrical isolate gate metals" was invented by Leonard P. Guler (Hillsboro, Ore.), Sukru Yemenicioglu (Portland, Ore.), Shengsi Liu (Portland, Ore.), Shao Ming Koh (Tigard, Ore.) and Tahir Ghani (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for techniques for creating a wall within a forkFET transistor structure, where the wall is adjacent to a first stack of nanoribbons on a first side of the wall and a second stack...