US Patent Issued to Intel on March 17 for "Package architecture of large dies using quasi-monolithic chip layers" (Arizona, Arkansas, Oregon, California Inventors)

ALEXANDRIA, Va., March 17 -- United States Patent no. 12,581,968, issued on March 17, was assigned to Intel Corp. (Santa Clara, Calif.).

"Package architecture of large dies using quasi-monolithic chip layers" was invented by Adel A. Elsherbini (Chandler, Ariz.), Scott E. Siers (Alma, Ark.), Gerald S. Pasdast (San Jose, Calif.), Johanna M. Swan (Scottsdale, Ariz.), Henning Braunisch (Phoenix), Kimin Jun (Portland, Ore.), Jiraporn Seangatith (Chandler, Ariz.), Shawna M. Liff (Scottsdale, Ariz.), Mohammad Enamul Kabir (Portland, Ore.) and Sathya Narasimman Tiagaraj (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Embodiments of a microelectronic assembly comprise: a plurality of layers of IC die...