US Patent Issued to Intel on June 2 for "Half latch level shifting circuit for non-volatile memory architectures" (California, Idaho Inventors)

ALEXANDRIA, Va., June 2 -- United States Patent no. 12,645,589, issued on June 2, was assigned to Intel Corp. (Santa Clara, Calif.).

"Half latch level shifting circuit for non-volatile memory architectures" was invented by William K. Waller (Boise, Idaho) and Sarang Agrawal (Sunnyvale, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A memory device may include a level shifter circuit that drives multiples half latch circuits. The half latch circuits may each include a p-channel transistor whose source is connected to a first voltage and whose gate is to receive addressing signals, a first inverter circuit connected between the drain of the p-channel transistor and a second voltage and whose input is co...