US Patent Issued to Intel on July 28 for "Program analysis, design space exploration and verification for high-level synthesis via e-graph rewriting" (British, American, Swiss Inventors)

ALEXANDRIA, Va., July 28 -- United States Patent no. 12,693,838, issued on July 28, was assigned to Intel Corp. (Santa Clara, Calif.).

"Program analysis, design space exploration and verification for high-level synthesis via e-graph rewriting" was invented by Jianyi Cheng (London), Samuel Coward (London), Lorenzo Chelini (Zurich), Rafael Barbalho (Orangevale, Calif.) and Theo Drane (El Dorado Hills, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Described herein is a technique and associated tool for automatic program code optimization for high-level synthesis. The tool can efficiently explore multiple representations of an input program using e-graph rewriting and determine an HLS-efficient represent...