US Patent Issued to Intel on Feb. 17 for "Hierarchical core valid tracker for cache coherency" (Oregon, Massachusetts, Washington, California Inventors)

ALEXANDRIA, Va., Feb. 17 -- United States Patent no. 12,554,644, issued on Feb. 17, was assigned to Intel Corp. (Santa Clara, Calif.).

"Hierarchical core valid tracker for cache coherency" was invented by Yedidya Hilewitz (Sharon, Mass.), Monam Agarwal (Lynnwood, Wash.), Yen-Cheng Liu (Portland, Ore.) and Alexander Heinecke (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Techniques and mechanisms to provide hierarchical core valid tracking. In an embodiment, an apparatus comprises a cache to store information accessible by two or more cores, and circuitry coupled to the cache to maintain coherence of the information stored in the cache. The circuitry is further to hierarchically track respec...