US Patent Issued to Intel on April 7 for "Fill of vias in single and dual damascene structures using self-assembled monolayer" (Oregon Inventors)

ALEXANDRIA, Va., April 7 -- United States Patent no. 12,598,977, issued on April 7, was assigned to Intel Corp. (Santa Clara, Calif.).

"Fill of vias in single and dual damascene structures using self-assembled monolayer" was invented by Jiun-Ruey Chen (Hillsboro, Ore.), Christopher Jezewski (Portland, Ore.), John Plombon (Portland, Ore.), Miriam Reshotko (Portland, Ore.), Mauro Kobrinsky (Portland, Ore.) and Scott B. Clendenning (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Metallization interconnect structures, integrated circuit devices, and methods related to high aspect ratio interconnects are discussed. A self assembled monolayer is selectively formed on interlayer dielectric sidewalls ...