US Patent Issued to INTEL NDTM US on May 26 for "Modulation of source voltage in NAND-flash array read" (California Inventor)

ALEXANDRIA, Va., May 26 -- United States Patent no. 12,640,209, issued on May 26, was assigned to INTEL NDTM US LLC (Santa Clara, Calif.).

"Modulation of source voltage in NAND-flash array read" was invented by Narayanan Ramanan (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Modulation of the source voltage in a NAND-flash array read waveform can enable improved read-disturb mitigation. For example, increasing the source line voltage to a voltage with a magnitude greater than the non-idle source voltage during the read operation when the array is idle (e.g., not during sensing) enables a reduction in read disturb without the complexity arising from the consideration of multiple read types. ...