US Patent Issued to EFINIX on Oct. 20 for "Dynamic block size carry-skip adder construction on FPGAs by combining ripple carry adders with routable propagate/generate signals" (Canadian Inventor)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,769,511, issued on Oct. 20, was assigned to EFINIX INC. (Santa Clara, Calif.).

"Dynamic block size carry-skip adder construction on FPGAs by combining ripple carry adders with routable propagate/generate signals" was invented by Marcel Gort (Toronto).

According to the abstract* released by the U.S. Patent & Trademark Office: "An adder is implemented in a field programmable gate array (FPGA). The adder has a first ripple carry adder block, for least significant bits of the adder. The adder has a plurality of carry skip adder blocks of differing block sizes. Each block size relates to bit-width of input to a block. The carry skip adder blocks of differing block sizes are for a pluralit...