US Patent Issued to Destination 2D on Sept. 1 for "Large-area wafer-scale CMOS-compatible 2D-material intercalation doping tools, processes, and methods, including doping of synthesized graphene" (California Inventors)

ALEXANDRIA, Va., Sept. 1 -- United States Patent no. 12,727,408, issued on Sept. 1, was assigned to Destination 2D Inc. (San Jose, Calif.).

"Large-area wafer-scale CMOS-compatible 2D-material intercalation doping tools, processes, and methods, including doping of synthesized graphene" was invented by Kaustav Banerjee (Goleta, Calif.), Ravi Iyengar (Milpitas, Calif.) and Satish Sundar (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "An intercalation doping apparatus including: a reactor chamber where single or multiple wafers or substrates (SoMWoSubs) are disposed within the reactor chamber, where SoMWoSubs have a diameter or a side distance from 25 mm to 450 mm; a heater, where the heater is ...