US Patent Issued to Cadence Design Systems on March 24 for "Multiplexing scheme for multi-clock prototyping" (Oregon, California Inventors)

ALEXANDRIA, Va., March 24 -- United States Patent no. 12,585,852, issued on March 24, was assigned to Cadence Design Systems Inc. (San Jose, Calif.).

"Multiplexing scheme for multi-clock prototyping" was invented by Rupesh S. Shelar (Hillsboro, Ore.), Akash Sharma (Livermore, Calif.) and Sanjay Dhar (Lake Oswego, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Aspects of the present disclosure address systems and methods for multi-clock prototyping. Data representing an integrated circuit design is accessed. The integrated circuit design comprises multiple partitions and specifies a set of cut nets between a first partition and a second partition. A plurality of clock domains among the set of cut nets is...