US Patent Issued to Astera Labs on June 9 for "Optimizing latency of read transactions with metadata update in memory expansion devices" (California Inventors)

ALEXANDRIA, Va., June 9 -- United States Patent no. 12,650,770, issued on June 9, was assigned to Astera Labs Inc. (Santa Clara, Calif.).

"Optimizing latency of read transactions with metadata update in memory expansion devices" was invented by Nirav Ishwarbhai Patel (Fremont, Calif.) and Anh Thien Tran (Elk Grove, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A memory read response is received from a memory controller in response to a memory request and includes specific data and specific metadata attendant to the specific data retrieved with specific memory addresses in the device memory. The specific data and specific metadata are sent to a host device in a host-bound memory read response. In resp...