ALEXANDRIA, Va., Sept. 30 -- United States Patent no. 12,748,705, issued on Sept. 29, was assigned to Ampere Computing LLC (Santa Clara, Calif.).
"Multi-core processor-based system implementing directed page table entry invalidation" was invented by Ramya Jayaram Masti (Hillsboro, Ore.), Benjamin Crawford Chaffin (Portland, Ore.), Vincent Edward Von Bokern (Rescue, Calif.) and Raymond S. Tetrick (Portland, Ore.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A first core in a processor-based system may obtain information that identifies cores in a first set of cores, where the information also indicates that at least one core of the first set of cores is assigned to execute instructions for a first VM. The fi...