US Patent Issued to Ampere Computing on Nov. 3 for "Multi-core processors evicting cache lines from lower-level caches to higher-level caches by core-to-core transfers" (Oregon Inventor)

ALEXANDRIA, Va., Nov. 3 -- United States Patent no. 12,783,422, issued on Nov. 3, was assigned to Ampere Computing LLC (Santa Clara, Calif.).

"Multi-core processors evicting cache lines from lower-level caches to higher-level caches by core-to-core transfers" was invented by Richard James Shannon (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "To reduce a number of cache line transfers in a multi-core processor that includes a cache manager circuit to manage coherence of a cache memory system, a source central processing unit (CPU) core that is evicting a cache line from an associated lower-level cache memory transfers the evicted cache line to another core for storage in a "slice" of a higher...