GENEVA, Jan. 27 -- NEO SEMICONDUCTOR, INC. (1871 The Alameda, Suite 250San Jose, California 95126) filed a patent application (PCT/US2024/054809) for "ADVANCED 3D MEMORY CELLS AND ARRAY ARCHITECTURES AND PROCESSES" on Nov 06, 2024. With publication no. WO/2026/019445, the details related to the patent application was published on Jan 22, 2026.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): HSU, Fu-Chang (1228 Cordelia Ave.San Jose, California 95129)
Abstract: Various advanced 3D memory cells, array architectures, and processes are disclosed. In an embodiment, a method includes forming a stack co...