INTERNATIONAL PATENT: MICRON TECHNOLOGY, INC. FILES APPLICATION FOR "SYSTEMS AND METHODS FOR REDUCING TRACE EXPOSURE IN STACKED SEMICONDUCTOR DEVICES"

GENEVA, Feb. 4 -- MICRON TECHNOLOGY, INC. (8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006) filed a patent application (PCT/US2025/038548) for "SYSTEMS AND METHODS FOR REDUCING TRACE EXPOSURE IN STACKED SEMICONDUCTOR DEVICES" on Jul 21, 2025. With publication no. WO/2026/024658, the details related to the patent application was published on Jan 29, 2026.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): YE, Seng Kim (c/o Micron Technology, Inc.8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006), BOO, Kelvin Tan Aik (c/o Micron Technology, Inc.8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006)...