GENEVA, Dec. 2 -- MICRON TECHNOLOGY, INC. (8000 S. Federal WayBoise, Idaho 83716-9632) filed a patent application (PCT/US2025/030413) for "LOGICAL-TO-PHYSICAL MAPPING FOR ZONED NAMESPACE MEMORY SYSTEMS WITH A DATA CACHE" on May 21, 2025. With publication no. WO/2025/245254, the details related to the patent application was published on Nov 27, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): KANE, John J. (8000 S. Federal WayBoise, Idaho 83716-9632), STONELAKE, Paul Roger (8000 S. Federal WayBoise, Idaho 83716-9632)
Abstract: Methods, systems, and devices for logical-to-physical (L2P) mappin...