GENEVA, May 12 -- MICRON TECHNOLOGY, INC. (8000 South Federal WayBoise, Idaho 83716) filed a patent application (PCT/US2025/053187) for "ANALOG MULTIPLY AND ACCUMULATE ARCHITECTURE FOR COMPUTE-IN-MEMORY MACHINE LEARNING" on Oct 29, 2025. With publication no. WO/2026/096681, the details related to the patent application was published on May 07, 2026.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): TANAKA, Tomoharu (1-2-2-A907 Shinkoyasu Kanagawa-kuYokohama, Kanagawa 221-0013)

Abstract: A memory device includes a sub-block with strings and a local bitline. A gate of a sense transistor is coupled wi...