International Patent: DISAGGREGATED CACHES FOR PROCESSOR CORES

GENEVA, July 31 -- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC. filed a patent application (US2025/061139) for “DISAGGREGATED CACHES FOR PROCESSOR CORES”. With publication no. WO/2026/161194, here are the other details related to the patent application:

Kind: Initial Publication with ISR [A1]

IPC: H10W 72/30

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Disclaimer: Curated by HT Syndication....