MUMBAI, India, July 24 -- Intellectual Property India has published a patent application (202641086203 A) filed by Indian Institute Of Technology Madras Iit Madras on July 14, 2026, for Timing Side Channel Attack Mitigation In Speculative Memory Dependency Resolution.

Inventors include Veezhinathan, Kamakoti; Srinivasan, Gopalakrishnan; Subramanian, Gayathri; and Palani, Girinath.

The application for the patent was published on July 17, 2026, under issue no. 29/2026.

Abstract: ABSTRACT TIMING SIDE CHANNEL ATTACK MITIGATION IN SPECULATIVE MEMORY DEPENDENCY RESOLUTION 5 Example approaches for mitigating timing side-channel attacks in a processor are described. An example approach includes generating a random mask selecting a subset of a pl...