MUMBAI, India, Oct. 26 -- Intellectual Property India has published a patent application (202641123902 A) filed by Srm Institute Of Science And Technology, Ramapuram; and Easwari Engineering College on October 16, 2026, for Self Adaptive Clocking System For Low Power Vlsi Design.

Inventors include Dr. N. Mahesh Kumar; Santo Briana A; Aishwarya R; Pavatharani V; and Sraddha Jothi Manikandan.

The application for the patent was published on October 23, 2026, under issue no. 43/2026.

Abstract: Abstract In synchronous digital circuits, fixed frequency clocking wastes dynamic power when activity is low. This is a serious issue for battery-powered embedded systems, IoT devices and applications with varying computational workloads . The present ...