Intellectual Property India Publishes Patent Application for Optimized Stochastic Computing Architecture Using Clock-Gated Mean And Square Root Units

MUMBAI, India, July 7 -- Intellectual Property India has published a patent application (202641077342 A) filed by Jagadeesan Sofia Priyadharshini; and Rajeev Gandhi Memorial College Of Engineering And Technology Autonomous on June 23, 2026, for Optimized Stochastic Computing Architecture Using Clock-Gated Mean And Square Root Units.

Inventors include Dr. J. Sofia Priya Dharshini; D. Manasa; V. Yeswanth; and K. Praveen Kumar.

The application for the patent was published on July 03, 2026, under issue no. 27/2026.

Abstract: Low-light image enhancement is one of the major issues in the computer vision domain; low light image enhancement is needed across the various application domains to include: surveillance, autonomous driving, and mobile ...