MUMBAI, India, July 13 -- Intellectual Property India has published a patent application (202611007909 A) filed by Indian Institute Of Technology, Jammu on January 27, 2026, for Low-Overhead Secure Memory Scrambling System And Method Using Generic Lfsr.
Inventors include Kumar, Gaurav; and Ahlawat, Satyadev.
The application for the patent was published on July 10, 2026, under issue no. 28/2026.
Abstract: The present disclosure provides a lightweight, and secure memory scrambling system (100) and method (200) based on a generic linear feedback shift register (LFSR) designed to enhance the security of DDR3 main memory against cold boot and related side- channel attacks. The proposed mechanism introduces an address- and seed-dependent dynam...