MUMBAI, India, June 30 -- Intellectual Property India has published a patent application (202641074846 A) filed by Mlr Institute Of Technology on June 17, 2026, for High-Speed Fir Filter Using Computation Sharing Multiplier (cshm), Radix-256 Booth Encoding And Redundant Binary Arithmetic.
Inventors include Mrs. B. Anusha; Mrs. Y. Geetha; and Ms. B. Sireesha.
The application for the patent was published on June 26, 2026, under issue no. 26/2026.
Abstract: The present invention discloses a high-speed FIR filter architecture employing a Computation Sharing Multiplier (CSHM), Radix-256 Booth encoding, Novel Partial Product Generation methodology, and Redundant Binary arithmetic. The proposed architecture significantly reduces multiplication ...