MUMBAI, India, Nov. 2 -- Intellectual Property India has published a patent application (202641126822 A) filed by Vellore Institute Of Technology on October 24, 2026, for Hardware Sampling-Firewall Apparatus For Denying Steganographic Covert Channels In Language Model Output.
Inventors include Rajkumar S; and Aryan Hundia.
The application for the patent was published on October 30, 2026, under issue no. 44/2026.
Abstract: ABSTRACT HARDWARE SAMPLING-FIREWALL APPARATUS FOR DENYING STEGANOGRAPHIC COVERT CHANNELS IN LANGUAGE MODEL OUTPUT A hardware sampling-firewall apparatus interposed on an output data bus of a large-language-model inference accelerator downstream of upstream logit computation circuitry (000) includes a logit bus tap (101)...