MUMBAI, India, Sept. 22 -- Intellectual Property India has published a patent application (202641109302 A) filed by Vellore Institute Of Technology, Chennai on September 11, 2026, for Fault-Tolerant Arithmetic Processing System And Method Using Reversible Gates.
Inventors include Deepa M; and Augusta Sophy Beulet P.
The application for the patent was published on September 18, 2026, under issue no. 38/2026.
Abstract: Embodiments of the present disclosure relate to a fault-tolerant arithmetic processing system (100) and a method (300). The system (100) may include reversible logic gates (102), a processor (120) and a memory (130). The processor (120) is configured to receive input operands and generate one or more intermediate arithmetic ...